Fall 2001
(M W F 10-10:50am HOCH 114)

EE310 Electronic Devices and Circuits I

Professor C. R. Wie
215C Bonner Hall, wie@eng.buffalo.edu

 

Course Outline

Plan

F01

1.                  Introduction to Electronics

1.1-2      Signals and Their Frequency Spectrum (omit pg. 3-5)*

1.3     Analog and Digital Signals

1.4-5      Amplifiers and Circuit Models for Amplifiers (omit pg. 14-17)

1.6     Frequency Response of Amplifiers

1.7             The Digital Logic Inverter (omit pg. 39, 40, 41, 46)*

end wk 1

 

2.                  Operational Amplifiers (Op Amps)

2.1-2      The Ideal Op Amp

2.3             The Inverting Op Amp Configuration

2.4             Applications of the Inverting Op Amp Configuration

2.5             The Noninverting Op Amp Configuration

2.6             More Examples of Op Amp Circuits

2.7             Performance Considerations for Non-Ideal Op Amps

(omit 97-108)                                                                                  end wk 2

 

3.                  Diodes

3.1             The Ideal Diode

3.2             Terminal Characteristics of Junction Diodes

3.3             Physical Operation of Junction Diodes - structure, fabrication,

applications, charge carriers, potential, capacitance, current,

stored charge                                                                          Exam 1

3.4             Analysis of Diode circuits

3.5             Diode Small-Signal Model and Its Application

3.6             Avalanche Breakdown and Zener Diodes

3.7,8  Rectifier Circuits and Clamping Circuits

3.10         Other Diode Types - Schottky, Ohmic contact, tunnel, photo

3.10         The SPICE Diode Model and Diode Circuit Simulation*

end wk 5

4.                  Bipolar Junction Transistors (BJTs)

4.1             Physical Structure and Modes of Operation

4.2             Operation of the npn transistor in The Active Region

4.3             The pnp Transistor

4.4             Circuit Symbols and Conventions

4.5             Graphical Representation of Transistor Characteristics

 


Plan F01

4.6             Analysis of Transistor Circuits

4.7             The Transistor as an Amplifier

4.8             Small-Signal Equivalent Circuit Models

4.9             Graphical Analysis of Transistor Circuits

4.10         Biasing

4.11         Basic Single-Stage BJT Amplifier Configurations

4.12         The Transistor as a Switch

4.13         Large-Signal Model for the BJT: Ebers-Moll Model (summary only)

4.14         The Basic BJT Logic Inverter (omit most)

4.15         Internal Capacitance (omit some)

4.16         The SPICE BJT Model and BJT Circuit Simulation*

end wk 8

Exam 2

5.                  Field-Effect Transistors (FETs)

5.1             Enhancement-Mode MOSFET Structure and Operation

5.2             Enhancement-Mode MOSFET I-V Chracteristics

5.3             The Depletion-Mode MOSFET

5.4             MOSFET Circuits at DC

5.5             The MOSFET as an Amplifier

5.6             Biasing in MOSFET Amplifier Circuits

5.7             Basic Single-Stage MOSFET Amplifier Configurations

5.8             The  CMOS Digital Logic Inverter*

5.9             The MOSFET as an Analog Switch*

5.10         MOSFET Internal Capacitances and High Frequency Model

5.11         The JFET (summary only)*

5.12         The MESFET (summary only)*

5.13         The SPICE MOSFET Model and MOSFET Circuit Simulation*

end wk 11

Exam 3

 

13.             MOS Digital Circuits

13.1   Digital Circuit Design: An Overview (omit pg.1048-1049)

13.2   Design and Performance Analysis of CMOS Inverter

13.3   CMOS Logic-Gate Circuits

(omit 13.4;  13.6;  and 13.8)

13.5--Pass-Transistor Logic Circuits *

13.7--Latches and Flip-Flops*

13.9--Semiconductor Memories*

13.10--RAM Cells*

13.11—Sense Amplifiers and Address Decoders*

(omit the rest)

* As time permits

 

 

 

end wk 13

 


6.                  Differential Amplifiers

6.1             The BJT Differential Pair

6.2             Small signal Operation

6.3             Biasing

6.4             Active Load

6.5             MOS Differential Amplifiers

6.6             Multistage Amplifiers

(omit the rest)                                                                    end wk 15

Final Exam

 

*As time permits

 

 

Required reading list and bibliography.

 

A.                 Adel S. Sedra and Kenneth C. Smith, "Microelectronic Circuits," 4th Edition, Oxford University Press, 1998.  Chapters 1 to 6.

B.                 M.E.Herniter, “Schematic Capture with Cadence Pspice”, Prentice Hall, 2001, ISBN: 0-13-027694-4

C.                The Semiconductor Java Applet Service at http://jas.eng.buffalo.edu/